1. Field of the Invention
The present invention relates to a semiconductor chip package, and in particular to a lead frame and bottom lead semiconductor package using the lead frame of which leads serving as an external connection terminal are respectively exposed on both first surface and second surface of the package.
2. Description of the Background Art
FIG. 1A is a perspective view of a two-chip stacked semiconductor device in accordance with a background art, and FIG. 1B is a cross-sectional view of the stacked semiconductor device taken along line bxe2x80x94b of FIG. 1A in accordance with the background art.
The stacked semiconductor package 5 according to the background art is constructed in that, on a first surface of a lower semiconductor package 2 having a plurality of outer leads 2a, an upper semiconductor package 1 having a plurality of outer leads 2a corresponding one by one to the plurality of outer leads 1a is stacked, and the mutually corresponding outer leads 1a and 2a between the packages 1 and 2 are electrically connected by rails 3.
The lower semiconductor package 2 and the upper semiconductor package 1 have the same size, and respective outer leads 1a and 2a also have the same size. The outer leads 1a and 2a are formed short. The rail 3 has a hole through which the mutually corresponding outer leads 1a and 2a of the semiconductor packages 1 and 2 are protruded. The rails are used for electrically connecting the outer leads 1a and 2a of each vertical line of the stacked semiconductor package 5 to each other, of which a lower portion is bent in a J-shape, a I-shape or a gull-shape.
FIGS. 2A through 2C are sectional views for showing fabricating process of the stacked semiconductor package illustrated in FIGS. 1A and 1B in accordance with the background art.
As shown in these drawings, there is provided an upper semiconductor packages each having a plurality of outer leads 1a exposed at its side. Each package has the same size to each other, and each outer lead 1a has the same size. The outer leads 1a are formed short. And, there is also provided a lower semiconductor package 2 having the same shape as the upper semiconductor package 1.
Referring to FIG. 2B, the upper semiconductor package 1 is stacked on the lower semiconductor package 2 by using an adhesive member 100. Each outer lead 1a of the upper semiconductor package 1 is corresponding one by one to each outer lead 2a of the lower semiconductor package 2, of which size and shape are the same to each other.
Referring to FIG. 2C, rails 3 having the hole at the position corresponding to each lead 1a and 2a are inserted to the outer leads 1a and 2a to electrically connect the mutually corresponding outer leads 1a and 2a of the packages 1 and 2 and then is soldered to thereby complete the stacked semiconductor package 5 in the background art. The rails 3 are mutually and electrically insulated to each other, being used for electrically connecting the outer leads 1a and 2a of each vertical line of the stacked semiconductor package 5 to each other, of which a lower portion is bent in a J-shape, a I-shape or a gull-shape.
However, the background semiconductor package as described above has disadvantages in that, firstly, the additional process is needed to make the rails to electrically connect the mutually corresponding outer leads, secondly, since the rails must be inserted to the outer leads one by one, its process is inefficient, and thirdly, the rails are required to be attached to the package by separate production, making an overall align process impossible.
Therefore, an object of the present invention is to provide a lead frame and bottom lead semiconductor package using the lead frame of which leads serving as an external connection terminal are respectively exposed on both a first surface and a second surface of the package to thereby facilitate stacking and improving a heat release.
In order to achieve the above object of the present invention, there is provided a lead frame in accordance with one embodiment of the present invention including: a pair of guide rails separated at a predetermined space; at least one dam bar for connecting the pair of guide rails; a die paddle for mounting a semiconductor chip between the dam bar; a tie bar for supporting the die paddle; and a plurality of leads each consisting of a first lead having a predetermined length extended from the dam bar between the dam bar and the die paddle, a second lead connected electrically to the first lead and formed bent in a first direction, and a third lead connected electrically to the second lead and formed bent in a second direction.
The second and third leads are bent in a predetermined depth from the first lead in the opposite direction to each other.
There is also provided a lead frame in accordance with another embodiment of the present invention including a pair of guide rails separated parallel with each other at a predetermined space; at least one dam bar for connecting the pair of guide rails; a first lead having a predetermined length extended from one end portion of the dam bar; and a second and a third leads extended from a predetermined portion of the first lead to the dam bar.
The second and third lead are respectively formed at both sides of the first lead, and are respectively bent in the opposite direction to each other in a predetermined depth.
In addition, there is provided a bottom lead semiconductor package in accordance with one embodiment of the present invention including a lead frame including a plurality of leads each consisting of a first lead having a predetermined length, a second and a third leads extended from the first lead, and a die paddle; a semiconductor chip having a plurality of bonding pads attached onto the die paddle of the lead frame; a connection means for electrically connecting the plurality of first leads to the plurality of bonding pads; and a package main body of which a predetermined region including the semiconductor chip, the wire, and the lead frame is molded by using a molding resin with at least one surface of each of the die paddle, second and third leads exposed.
There is also provided a bottom lead semiconductor package in accordance with another embodiment of the present invention including: a semiconductor chip having a first and a second surfaces, and having a plurality of bonding pads on the first surface; a plurality of leads each consisting of a first lead having a first and a second surfaces, the first surface being attached onto the first surface of the semiconductor chip, a second and a third leads each having a first and a second surfaces extended from a predetermined portion of the first lead; a connection means for electrically connecting the first leads and the bonding pads; and a package main body of which a predetermined region including the semiconductor chip, the lead and the connection means are sealed with the first surface of the second leads and the second surface of the third leads exposed respectively.